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Side by Side Diff: src/compiler/mips64/instruction-selector-mips64.cc

Issue 2780503002: MIPS[64]: Support for some SIMD operations (2) (Closed)
Patch Set: rebased Created 3 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
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2699 void InstructionSelector::VisitS1x8Zero(Node* node) { 2699 void InstructionSelector::VisitS1x8Zero(Node* node) {
2700 Mips64OperandGenerator g(this); 2700 Mips64OperandGenerator g(this);
2701 Emit(kMips64S128Zero, g.DefineSameAsFirst(node)); 2701 Emit(kMips64S128Zero, g.DefineSameAsFirst(node));
2702 } 2702 }
2703 2703
2704 void InstructionSelector::VisitS1x16Zero(Node* node) { 2704 void InstructionSelector::VisitS1x16Zero(Node* node) {
2705 Mips64OperandGenerator g(this); 2705 Mips64OperandGenerator g(this);
2706 Emit(kMips64S128Zero, g.DefineSameAsFirst(node)); 2706 Emit(kMips64S128Zero, g.DefineSameAsFirst(node));
2707 } 2707 }
2708 2708
2709 void InstructionSelector::VisitF32x4Splat(Node* node) {
2710 VisitRR(this, kMips64F32x4Splat, node);
2711 }
2712
2713 void InstructionSelector::VisitF32x4ExtractLane(Node* node) {
2714 VisitRRI(this, kMips64F32x4ExtractLane, node);
2715 }
2716
2717 void InstructionSelector::VisitF32x4ReplaceLane(Node* node) {
2718 VisitRRIR(this, kMips64F32x4ReplaceLane, node);
2719 }
2720
2721 void InstructionSelector::VisitF32x4SConvertI32x4(Node* node) {
2722 VisitRR(this, kMips64F32x4SConvertI32x4, node);
2723 }
2724
2725 void InstructionSelector::VisitF32x4UConvertI32x4(Node* node) {
2726 VisitRR(this, kMips64F32x4UConvertI32x4, node);
2727 }
2728
2709 // static 2729 // static
2710 MachineOperatorBuilder::Flags 2730 MachineOperatorBuilder::Flags
2711 InstructionSelector::SupportedMachineOperatorFlags() { 2731 InstructionSelector::SupportedMachineOperatorFlags() {
2712 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags; 2732 MachineOperatorBuilder::Flags flags = MachineOperatorBuilder::kNoFlags;
2713 return flags | MachineOperatorBuilder::kWord32Ctz | 2733 return flags | MachineOperatorBuilder::kWord32Ctz |
2714 MachineOperatorBuilder::kWord64Ctz | 2734 MachineOperatorBuilder::kWord64Ctz |
2715 MachineOperatorBuilder::kWord32Popcnt | 2735 MachineOperatorBuilder::kWord32Popcnt |
2716 MachineOperatorBuilder::kWord64Popcnt | 2736 MachineOperatorBuilder::kWord64Popcnt |
2717 MachineOperatorBuilder::kWord32ShiftIsSafe | 2737 MachineOperatorBuilder::kWord32ShiftIsSafe |
2718 MachineOperatorBuilder::kInt32DivIsSafe | 2738 MachineOperatorBuilder::kInt32DivIsSafe |
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2738 } else { 2758 } else {
2739 DCHECK(kArchVariant == kMips64r2); 2759 DCHECK(kArchVariant == kMips64r2);
2740 return MachineOperatorBuilder::AlignmentRequirements:: 2760 return MachineOperatorBuilder::AlignmentRequirements::
2741 NoUnalignedAccessSupport(); 2761 NoUnalignedAccessSupport();
2742 } 2762 }
2743 } 2763 }
2744 2764
2745 } // namespace compiler 2765 } // namespace compiler
2746 } // namespace internal 2766 } // namespace internal
2747 } // namespace v8 2767 } // namespace v8
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