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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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165 V(Mips64ByteSwap32) \ | 165 V(Mips64ByteSwap32) \ |
166 V(Mips64StackClaim) \ | 166 V(Mips64StackClaim) \ |
167 V(Mips64Seb) \ | 167 V(Mips64Seb) \ |
168 V(Mips64Seh) \ | 168 V(Mips64Seh) \ |
169 V(Mips64AssertEqual) \ | 169 V(Mips64AssertEqual) \ |
170 V(Mips64S128Zero) \ | 170 V(Mips64S128Zero) \ |
171 V(Mips64I32x4Splat) \ | 171 V(Mips64I32x4Splat) \ |
172 V(Mips64I32x4ExtractLane) \ | 172 V(Mips64I32x4ExtractLane) \ |
173 V(Mips64I32x4ReplaceLane) \ | 173 V(Mips64I32x4ReplaceLane) \ |
174 V(Mips64I32x4Add) \ | 174 V(Mips64I32x4Add) \ |
175 V(Mips64I32x4Sub) | 175 V(Mips64I32x4Sub) \ |
| 176 V(Mips64F32x4Splat) \ |
| 177 V(Mips64F32x4ExtractLane) \ |
| 178 V(Mips64F32x4ReplaceLane) \ |
| 179 V(Mips64F32x4SConvertI32x4) \ |
| 180 V(Mips64F32x4UConvertI32x4) |
176 | 181 |
177 // Addressing modes represent the "shape" of inputs to an instruction. | 182 // Addressing modes represent the "shape" of inputs to an instruction. |
178 // Many instructions support multiple addressing modes. Addressing modes | 183 // Many instructions support multiple addressing modes. Addressing modes |
179 // are encoded into the InstructionCode of the instruction and tell the | 184 // are encoded into the InstructionCode of the instruction and tell the |
180 // code generator after register allocation which assembler method to call. | 185 // code generator after register allocation which assembler method to call. |
181 // | 186 // |
182 // We use the following local notation for addressing modes: | 187 // We use the following local notation for addressing modes: |
183 // | 188 // |
184 // R = register | 189 // R = register |
185 // O = register or stack slot | 190 // O = register or stack slot |
186 // D = double register | 191 // D = double register |
187 // I = immediate (handle, external, int32) | 192 // I = immediate (handle, external, int32) |
188 // MRI = [register + immediate] | 193 // MRI = [register + immediate] |
189 // MRR = [register + register] | 194 // MRR = [register + register] |
190 // TODO(plind): Add the new r6 address modes. | 195 // TODO(plind): Add the new r6 address modes. |
191 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 196 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
192 V(MRI) /* [%r0 + K] */ \ | 197 V(MRI) /* [%r0 + K] */ \ |
193 V(MRR) /* [%r0 + %r1] */ | 198 V(MRR) /* [%r0 + %r1] */ |
194 | 199 |
195 | 200 |
196 } // namespace compiler | 201 } // namespace compiler |
197 } // namespace internal | 202 } // namespace internal |
198 } // namespace v8 | 203 } // namespace v8 |
199 | 204 |
200 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 205 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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